EDN

Link for Modelsim 2 adds direct Verilog support

SAN FRANCISCO — The MathWorks Monday (July 24) announced the availability of Link for ModelSim 2, said to enhance the use of model-based design for hardware verification by offering full Verilog and ...
Design-Reuse

Hitachi Endorses Model Technology ModelSim for Verilog Simulation

PORTLAND, Ore.--(BUSINESS WIRE)--Oct. 3, 2001--Model Technology(TM), a Mentor Graphics company, today announced that the ModelSim® hardware description language (HDL) simulator has received Verilog ...
GitHub

htminuslab/Modelsim-Python-Demo1

Demo showing how to add a Python Constraint Solver to Modelsim This repository contains a simple FLI foreign subprogram example which calls a constraint solver written in Python. The demo shows how ...
EDN

System Verilog for the masses

Aiming to bring advanced verification languages like SystemVerilog and advanced methods like assertion-based verification to mainstream IC designers, Mentor Graphics this week is introducing its new ...
GitHub

htminuslab/Modelsim-Python-Demo2

Demo showing Modelsim calling the Python's Numpy and Matplotlib libraries via the Foreign Language Interface (FLI). A VHDL testbench generates 2 sine waves with some added noise, the Numpy and ...
Design-Reuse

Xilinx Modelsim verilog IP Listing

The USB20SR is a USB 2.0 Device, Software based enumeration RAM Interface IP Core. The core is RAM based with 32-bit Avalon interface and supports ULPI interface and Software Enumeration. It ... The ...