This example demonstrates how to use a high-performance programmable analog subsystem (HPPASS) SAR ADC pseudo-differential feature to measure the differential inputs voltage in Infineon's PSOC™ ...
This example demonstrates how to use a high-performance programmable analog subsystem (HPPASS) SAR ADC pseudo-differential feature to measure the differential inputs voltage in Infineon's PSOC™ ...
Abstract: This paper presents a 2b/cycle hybrid successive-approximation-register (SAR) analog-to-digital-converter (ADC) architecture with only 1 differential capacitor-DAC (CDAC). Unlike prior multi ...
Abstract: This paper presents a 16-bit 1 MS/s pseudo-differential Successive-Approximation-Register Analog-to-Digital Converter (SAR ADC) achieving an ENOB of 15-bit. To accommodate the ...
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